"Two substantial technology trends buttress my optimism for Blendics. First in the absence of aggressive clock frequency scaling in future semiconductor devices, increasing system-level integration -- in the form of systems-on-a-chip -- is the only clear path to increasing performance and functionality while decreasing power and cost. Second, the costs associated with the verification of large digital designs have risen dramatically in recent years, and they now represent a primary risk factor in the planning of new semiconductor products. By simplifying the design and verification of systems-on-a-chip, Blendics transforms these two technology trends into strategic advantages."

Patrick Crowley

Associate Professor

Department of Computer Science

and Engineering

Washington University   

"I enthusiastically support the Blendics Commercialization Plan for their design tool known as ClosureACE. They refer to the rapidly increasing problems with global timing closure and clock domain crossing verification. They propose this trend will accelerate with each doubling of transistor density. From my perspective, the problem is alive and well at today's transistor density levels. I believe Dr. Cox and his team are uniquely qualified to bring this solution to a market in great need."